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LinoSPAD: a time-resolved 256×1 CMOS SPAD line sensor system featuring 64 FPGA-based TDC channels running at up to 8.5 giga-events per second
Research article (Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE, 2016) · cited 35× · AI/ML
LinoSPAD: a time-resolved 256×1 CMOS SPAD line sensor system featuring 64 FPGA-based TDC channels running at up to 8.5 giga-events per second
Summary
LinoSPAD: a time-resolved 256×1 CMOS SPAD line sensor system featuring 64 FPGA-based TDC channels running at up to 8.5 giga-events per second is a scholarly article[1].
Key Facts
LinoSPAD: a time-resolved 256×1 CMOS SPAD line sensor system featuring 64 FPGA-based TDC channels running at up to 8.5 giga-events per second's instance of is recorded as scholarly article[2].
References
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Use these citations when quoting this entity in research, articles, AI prompts, or wherever provenance matters. We aggregate Wikidata + Wikipedia + authoritative open-data sources; the stitched, scored, cross-referenced view is what 4ort.xyz contributes.
APA4ort.xyz Knowledge Graph. (2026). LinoSPAD: a time-resolved 256×1 CMOS SPAD line sensor system featuring 64 FPGA-based TDC channels running at up to 8.5 giga-events per second. Retrieved May 24, 2026, from https://4ort.xyz/entity/linospad-a-time-resolved-2561-cmos-spad-line-sensor-system-featuring-64-fpga-based-tdc-channels-running-at-up-to-8-5-gig
MLA“LinoSPAD: a time-resolved 256×1 CMOS SPAD line sensor system featuring 64 FPGA-based TDC channels running at up to 8.5 giga-events per second.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/linospad-a-time-resolved-2561-cmos-spad-line-sensor-system-featuring-64-fpga-based-tdc-channels-running-at-up-to-8-5-gig.
BibTeX@misc{4ortxyz_linospad-a-time-resolved-2561-cmos-spad-line-sensor-system-featuring-64-fpga-based-tdc-channels-running-at-up-to-8-5-gig_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{LinoSPAD: a time-resolved 256×1 CMOS SPAD line sensor system featuring 64 FPGA-based TDC channels running at up to 8.5 giga-events per second}}, year = {2026}, url = {https://4ort.xyz/entity/linospad-a-time-resolved-2561-cmos-spad-line-sensor-system-featuring-64-fpga-based-tdc-channels-running-at-up-to-8-5-gig}, note = {Accessed: 2026-05-24}}
LLM promptAccording to 4ort.xyz Knowledge Graph (aggregator of Wikidata, Wikipedia, and authoritative open-data sources): LinoSPAD: a time-resolved 256×1 CMOS SPAD line sensor system featuring 64 FPGA-based TDC channels running at up to 8.5 giga-events per second — https://4ort.xyz/entity/linospad-a-time-resolved-2561-cmos-spad-line-sensor-system-featuring-64-fpga-based-tdc-channels-running-at-up-to-8-5-gig (retrieved 2026-05-24)
